NcodiN: Shaping the Future of Optical Interconnects

A fundamental bottleneck is emerging as processors grow more powerful: moving data between chips fast enough and efficiently enough to match their raw compute power. At every scale of a computing system, from within a processor package to across data center racks, copper interconnects are hitting their physical limits, driving up power consumption and capping the performance gains that new silicon alone could otherwise deliver. The industry is increasingly looking to photonics as the only path forward.

NcodiN was founded in 2023, building on years of joint research into nanolaser technology at a Paris laboratory. Francesco Manegatti and Fabrice Raineri, lead the company as CEO and CTO, bringing the core technological expertise directly into the leadership team. The company is developing NConnect, an integrated optical interconnect platform powered by the world’s smallest laser on silicon (500 times smaller than today’s industry-standard devices), enabling ultra-dense integration and record-low energy operation.

What sets NcodiN apart is its ability to integrate nanolasers directly on silicon, enabling in-package optical links that can scale to thousands of lasers per square millimeter. The company closed a €16M seed round in November 2025 (following a €3.5M pre-seed), with new investors including Maverick Silicon, MIG Capital, PhotonVentures and Verve Ventures, alongside existing investors OVNI Capital, Elaia and Earlybird.

This is our second interview with NcodiN. A lot has happened since our first conversation over two years ago. Learn more about the future of optical interconnects from our interview with NcodiN co-founder and CEO, Francesco Manegatti:

What Inspired You to Start NcodiN?

It was really a combination of three things: love for the technology, a personal appetite for challenges and a market opportunity. I think that’s the sweet spot.

I first discovered photonics during my master’s, at a time when it wasn’t yet a big thing in academia. While I was doing an internship with Fabrice, my co-founder today and I fell in love with the field. I wanted to deepen my expertise and pursue a PhD in Paris, working on the nanolasers that today power our optical interposer.

Editor’s note: An optical interposer is a hardware component that sits between chips and routes optical signals between them. It acts as an intermediary layer within a chip package, enabling high-speed communication via light rather than electrical wires.

At the time, I didn’t imagine I’d become a startup founder. My plan was to build competencies and eventually move into a corporate role. But during the PhD, something shifted. I was surrounded by inspiring examples. Quandela, for instance, was spun out of the same lab and seeing Valeria and Niccolò, the Quandela founders, navigate all the early challenges made the idea feel real and achievable.

So in 2019 and early 2020, I proposed to Fabrice that we take the technology to a new level and create value on the market. We started working on the business model, defining the problem we were solving and identifying the product. The use case was clear from the start: interconnects are the killer application for photonics. And with the rise of generative AI and ChatGPT, we could see this explosion in the need for more and more computing power, which meant the need to extend processors beyond a single piece of silicon. That’s where we saw the opportunity and that’s how everything started.

What Problem Does NcodiN Solve and Where in the Computing Stack Does It Operate?

Technologically, we work on optical interconnects. We solve the copper bottleneck. But in terms of the value we bring, it’s really about unlocking the roadmap for chip makers over the next three years.

Editor’s note: Optical interconnects are systems that transmit data between chips or components using light rather than electrical signals. While an optical interposer (mentioned above) is the specific physical component that routes light within a package, optical interconnects refer to the broader system.

The problem is that we’re no longer talking about compute-limited systems. We’re talking about bandwidth-limited systems. The question now is: how quickly and efficiently can I transfer data among all the computing entities within a processor? And it’s not just within the processor. It’s at every scale of a supercomputing infrastructure: within the rack, among racks, across data centers. The segment we focus on is within the processor, because this is where the most demanding performance requirements live.

Editor’s note: Bandwidth is the amount of data that can be transferred between systems per second. 

Editor’s note: A rack is a standard enclosure used in data centers to house and organize servers and computing hardware. Data must travel between components within a rack and between racks.

If you look at today’s flagship AI processors (the NVIDIA Blackwell series, for example), all those chips form the core of the computation behind tools like ChatGPT or any cloud-based generative AI software. The problem is that GPUs and the High Bandwidth Memory (HBM) integrated within these processors need to communicate extremely quickly and efficiently. And copper can’t keep up. Every GPU die or memory die is already operating below its maximum capacity, because data is constantly bottlenecked traveling through copper traces from point A to point B.

Editor’s note: High Bandwidth Memory (HBM) is a high-speed memory standard used in AI accelerators. It stacks multiple memory dies vertically to deliver very high data transfer rates in a compact footprint.

Editor’s note: A die is a single chip cut from a silicon wafer. Modern AI processors often combine multiple dies in one package to increase performance.

What we bring is additional lanes for those highways: to speed up the flow of data, maximize the capacity of every chip and keep extending those processors horizontally by adding chips that communicate through optical links rather than copper.

Can You Walk Us Through the Architecture of NConnect and How It Integrates on Silicon?

NConnect is powered by our core technology: the world’s smallest laser integrated on silicon. The advantage of having an extremely small laser is that we can integrate it densely, at over 5,000 nanolasers per square millimeter.

During our research, we solved the three main challenges for this class of device: 1) designing compact structures, 2) integrating them on silicon and 3) electrically driving them while operating at room temperature or higher.

In practice, what we do is take an electronic signal from the emitter (say, a GPU), convert it into light, propagate it through a routing system based on silicon waveguides and then at the receiver side (say, an HBM), convert the optical signal back into an electrical current. That current feeds into the receiving chip and closes the loop. We took the example of a GPU-to-HBM connection, but the technology is agnostic. It works GPU-to-GPU, HBM-to-HBM, any combination of chips that need to communicate at high speed.

Editor’s note: The emitter is the chip or component sending data. In an optical interconnect system, it converts an electronic signal into light for transmission.

Editor’s note: Silicon waveguides are microscopic structures etched into silicon that confine and guide light along controlled paths, similar to how optical fiber guides light over long distances.

Editor’s note: The receiver is the chip or component on the other end of the link. It detects the incoming optical signal and converts it back into an electrical current that the receiving chip can process.

What Performance Does NConnect Achieve Compared to Copper and Why Is the Gap So Significant?

With copper, there’s a fundamental trade-off between bandwidth, distance and energy. Because of this, I/O components in today’s chips are placed at the edge of dies to minimize the distance copper signals have to travel. You want the shortest possible path to transfer the most bandwidth at the lowest power. But the bandwidth requirements keep increasing and we’re already at the physical minimum for copper distances. You can’t miniaturize them further.

Editor’s note: I/O components (Input/Output components) are the circuits on the edge of a chip that handle sending and receiving data to and from other chips or systems. 

With photonics, we don’t suffer from the same fundamental limitations. In terms of concrete numbers: with copper, you can transfer around 2 terabits per second per millimeter at roughly 0.5 picojoules per bit, but only at minimum distances. At cm-scale distances, copper would need around 5 pJ/bit to achieve the same throughput. With NConnect, we achieve 40 terabits per second per millimeter at around 0.1 picojoules per bit over 2 millimeters or 20 or even 30 millimeters. That’s 20 times more bandwidth density and at cm-scale distances, NConnect is 50 times more energy efficient than copper.

Editor’s note: Picojoules per bit (pJ/bit) is a standard measure of energy efficiency in data transmission. Lower values mean less energy is consumed per unit of data transferred.

What Strategic Partnerships and Industrialization Milestones Have You Reached?

A major recent milestone is our collaboration with CEA-Leti, which we announced in March 2026. Together, we are industrializing NConnect on a 300 mm silicon photonics platform, transitioning our nanolaser from lab-scale prototypes to industrial-grade wafer-level processes. This is a foundational step toward scalable, cost-effective production for AI chips and high-bandwidth computing applications. Beyond that, we have advanced discussions ongoing with tier-one chipmakers, companies among the world’s top ten by market capitalization. The team is now close to 40 people and we are firmly in the industrialization phase.

Editor’s note: CEA-Leti is one of Europe’s leading applied research institutes in microelectronics and nanotechnology, based in Grenoble, France. 

Editor’s note: A wafer is a thin disc of semiconductor material on which chips are fabricated. 300 mm refers to the wafer’s diameter and is the industry-standard size for high-volume semiconductor manufacturing. 

How Do You See the Foundry Ecosystem Positioning Itself for Photonics and Where Does NcodiN Fit in That Landscape?

The dynamics are ramping up very quickly across the foundry ecosystem. The most important foundry in the AI world is TSMC and they have created their Co-Packaged Optics (CPO) platform for silicon photonics called COUPE, which is now the benchmark. NVIDIA is already using it for the NVLink switch and new generations of co-packaged optics products.

Editor’s note: Co-Packaged Optics (CPO) integrates optical components directly inside the chip package, reducing the distance signals need to travel and improving energy efficiency compared to pluggable optics placed outside the package.

But TSMC isn’t the only player and not even the pioneer. Tower Semiconductor has been working on photonics for years. GlobalFoundries announced their photonics platform almost five years ago. Intel Foundry has been active in photonics since before 2020. And in Europe, ST Microelectronics recently announced a major collaboration with AWS on optical transceivers through their PIC 100 platform.

It’s no longer about the dream of photonics. It’s concrete and it’s moving into qualification for mass production everywhere. I really believe that starting from the end of this year, at most within twelve months, we’ll start to see photonics commercialized at scale for scale-out network applications, followed by intra-rack applications within eighteen to twenty-four months. Our technology is positioned for the generation after that. Around 2030, we’ll see in-package optical interconnects being commercialized first at moderate volume then at massive volume.

Editor’s note: Scale-out refers to expanding computing capacity by adding more machines or nodes to a network rather than upgrading a single system. 

What Advice Would You Give to Fellow Deep Tech Founders?

At the early stage especially, though it’s valid at any stage, it’s very important to be super curious and super humble. Don’t hesitate to ping anyone you have in mind and ask for help, whether you’re asking people who have already been through the same challenges or whether you’re proactively reaching out to understand the market dynamics.

To build a strategy, you need to understand where you are, where you want to enter and where you want to play. The best way to do that is to talk to the players in the market, understand their problems and their challenges and use their feedback to define your product and the value you’re bringing to the table.

That curiosity doesn’t stop once the company starts growing. You still need to maintain it, to make sure you’re not just engaged in wishful thinking about your strategy, that you’re still in touch with reality and with how the market is evolving. Things can change extremely quickly. You don’t want to miss opportunities because you’re still in the mindset of three years ago.

Just talk to other people and stay curious.